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junior ic layout Engineer (pooling)Xinyx Semiconductor Design Services

Salary: Agreement
Work form: Full time
Posting Date: 21/09/2025
Deadline: 21/10/2025

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Job Summary
As a Junior Layout Engineer, you will be responsible for working as the technical engineering resource of an engineering team in layout development of IPs. Specific responsibilities will depend on project phase and availability. You will be focusing on providing solutions to the following challenges.Key Responsibilities:
Ensure utmost quality and personalized solutions for lifelong strategic partnership with our clients
Work with the engineering team to understand deeply the requirements, design and architecture to develop and realize client IPs
Perform and implement layout activities
Key Qualifications
Bachelor or above degree in Electronics Engineering, Computer Engineering or Electrical Engineering
At least 1 year experience in Full Custom IC Layout activities including but not limited to analog design and custom layout; standard cell to top-level routing and block level to top-level floorplanning
Experienced in doing I/O Architecture layout design is highly desirable.
Experienced up to top-level routing and verifications
Experienced in working on projects from start to finish and communicating directly with clients
Ability to work in a dynamic cross-functional and cross-site global team
Strong analytical skills
Decent communication and interpersonal skills
Programming skills a plus
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Xinyx Semiconductor Design Services

Other Info

Muntinlupa City, Metro Manila
Permanent
Full-time

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Xinyx Semiconductor Design Services


Position junior ic layout Engineer (pooling) recruited by the company Xinyx Semiconductor Design Services at MetroManila, Manila, Muntinlupa, Joboko automatically collects the salary of , finds more jobs on Junior IC Layout Engineer (Pooling) or Xinyx Semiconductor Design Services company in the links above
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