JOB DESCRIPTION
Job Description
•With at least 5 years experience in the related field
•Develop analog architectures and design circuits in FinFET, CMOS or BiCMOS DMOS Processes
•Analyze process nodes, competing architectures and determine the best-in-class implementation for the application.
•Design transistor-level circuits, perform post-layout parasitic-extraction, run pre-layout and back-annotated simulation, analyze parametric design trade-offs, and perform tape-out sign- off using industry leading EDA tools
•Supervise analog layout and able to edit the layout to run experimental simulation.
•Work collaboratively with multiple teams – digital, systems, test, application for silicon bring-up and to ensure DFT, DFM towards better yield during production.
•Perform post-layout parasitic-extraction and back-annotated simulations to validate design
•Initiate R&D for root cause failures, investigate anomalous observations in silicon across PVT corners, and be able to conclude a solution.
JOB QUALIFICATION
Requirements
Proven track record in one of the following areas:
Power Management: POR, Voltage & Current references, Buck/Boost converters based on PWM/PFM/COT architectures
Serial Links: USB/MIPI/HDMI/LVDS/DDR/LPDDR/SERDES
Data Converters: SAR/Pipeline/Hybrid with enob 8-14 bits
Proficiency with EDA tools including Cadence Virtuoso, Spectre, ADE, Mixed-mode AMS tools, Layout XL.
Extensive knowledge of layout effects for circuit and layout design. Ability to supervise layout engineers.
Extensive experience with post-layout extraction, simulation across PVT and physical verification through tape-out sign-off.
Experience with silicon bring-up, characterization, qualification, and meet production release criteria
Ability to communicate and work effectively with geographically dispersed teams of mixed-signal and digital engineers
Ability to work independently, analyze complex problems and drive solutions.
Have an entrepreneurial passion to drive technology and business.
OTHER JOB REQUIREMENTS
Education
Bachelor's/College Degree
Field of study
Engineering (Others)
Specialization
Other Engineering
Power Management
Job Description
•With at least 5 years experience in the related field
•Develop analog architectures and design circuits in FinFET, CMOS or BiCMOS DMOS Processes
•Analyze process nodes, competing architectures and determine the best-in-class implementation for the application.
•Design transistor-level circuits, perform post-layout parasitic-extraction, run pre-layout and back-annotated simulation, analyze parametric design trade-offs, and perform tape-out sign- off using industry leading EDA tools
•Supervise analog layout and able to edit the layout to run experimental simulation.
•Work collaboratively with multiple teams – digital, systems, test, application for silicon bring-up and to ensure DFT, DFM towards better yield during production.
•Perform post-layout parasitic-extraction and back-annotated simulations to validate design
•Initiate R&D for root cause failures, investigate anomalous observations in silicon across PVT corners, and be able to conclude a solution.
JOB QUALIFICATION
Requirements
Proven track record in one of the following areas:
Power Management: POR, Voltage & Current references, Buck/Boost converters based on PWM/PFM/COT architectures
Serial Links: USB/MIPI/HDMI/LVDS/DDR/LPDDR/SERDES
Data Converters: SAR/Pipeline/Hybrid with enob 8-14 bits
Proficiency with EDA tools including Cadence Virtuoso, Spectre, ADE, Mixed-mode AMS tools, Layout XL.
Extensive knowledge of layout effects for circuit and layout design. Ability to supervise layout engineers.
Extensive experience with post-layout extraction, simulation across PVT and physical verification through tape-out sign-off.
Experience with silicon bring-up, characterization, qualification, and meet production release criteria
Ability to communicate and work effectively with geographically dispersed teams of mixed-signal and digital engineers
Ability to work independently, analyze complex problems and drive solutions.
Have an entrepreneurial passion to drive technology and business.
OTHER JOB REQUIREMENTS
Education
Bachelor's/College Degree
Field of study
Engineering (Others)
Specialization
Other Engineering
Power Management
Submit profile
Marquee Semiconductor
About the company
Marquee Semiconductor jobs
26th and 27th Floors The Podium, Lower, Ortigas Center, Mandaluyong Philippines , 1605
Purchasing Officer (Senior Buyer)
GLOBALSUCCESS OVERSEAS EMPLOYMENT SERVICES
USD 700.00 - 1,200.00 per month
Position senior analog circu it Engineers recruited by the company Marquee Semiconductor at , Joboko automatically collects the salary of , finds more jobs on Senior Analog Circuit Engineers or Marquee Semiconductor company in the links above
About the company
Marquee Semiconductor jobs
26th and 27th Floors The Podium, Lower, Ortigas Center, Mandaluyong Philippines , 1605